Sr Design Enablement, CAD

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Our EDA and Design Enablement team sits at the heart of Micron's memory development. We build and support the tools and flows that enable world-class CMOS design  work closely with design, layout, and process teams, and we thrive on solving hard technical problems that directlyimpactproduct success.

As a CAD Engineer, you will play a critical role in keeping our design ecosystem running efficiently and reliably.

You’ll develop, improve, and support both in-house and commercial EDA tools while partnering closely with engineers across the design flow. This is a hands-on role for someone who enjoys debugging, innovating, and enabling others to do their best work.

• Design, develop, and support CAD software, EDA tools, flows, and methodologies for CMOS design and verification
• Debug, evaluate, and support in-house and commercial EDA solutions in a production environment
• Develop P-cells, scripts, and automation for physical design, verification, optimization, andtapeout
• Collaborate closely with design, PI, and process teams to solve workflow and tool challenges, and to implement scalable layout methodologies aligned with PDK requirements
• Document processes and provide training and support for end users

• Bachelor’s degree in Computer Engineering, Computer Science, or a related field
• 2+ years of experience in CAD, VLSI, or a related semiconductor engineering role
• Experience programming in SKILL/Skill++ (Cadence), Python, and/or Perl
• Experience with PDK development and/or validation and familiarity with Cadence EDA tools and flows
• Experience with Linux/Unix environments, shell scripting, databases, and version control
• Effective communication skills in a collaborative engineering environment

• Understanding of CMOS process fundamentals and layout design rules
• Understanding of photo/metrology marks and layout design
• Prior work supporting or developing EDA design tools, flows, and methodologies
• Experience supporting automation for physical design, verification, ortapeoutflows
• Mentor engineers, promote engineering excellence, and lead adoption of AI-assisted development practices
• Use AI assistant for fault and code analysis

The US base salary range that Micron Technology estimates it could pay for this full-time position is:

$ - $ a year

Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs.

Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.

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