Senior HBM Speed Interface Architect
Listed on 2026-10-17
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Engineering
Systems Engineer, Hardware Engineer
Micron Technology seeks a senior memory interface architect to own HBM IO blocks and subsystems from architectural definition through silicon bring-up and post-silicon debug. You will define PHY interfaces, clocking, training, calibration, and power-management requirements for advanced heterogeneous systems.
Lead cross‑functional teams across front-end, layout, SI/PI, thermal, and packaging to optimize 2.5D/3D memory-interface implementations and drive robust, high‑performance builds for AI/HPC
We are seeking a motivated Senior HBM & High-Speed Interface Architect to join Micron Technology in Richardson, TX, United States.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior HBM & High-Speed Interface Architect role in the description above.
We appreciate your interest in this position.
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