Sr Director - DfT, Test Development, HW Roadmap

Global Foundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, Global Foundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit

The Director of DfT and ATE HW Design will lead a team of highly skilled and talented DfT ((Design-for-Test), Test, and ATE HW Design Engineers, with responsibility in defining and overseeing implementation of various DfT techniques and methods, focused on driving lowest cost of test across digital, analog, mixed signal, memory (NVM), HSIO, and RF IPs and SOCs. You will define DfT and BiST methodologies and technologies that are high in efficiency, enabling organizational benchmarks in Cost-of-Test goals.

You will be tasked with supporting ATE HW designs for wafer-sort and final-test package level solutions. Knowledge of analog, RF, and high-speed digital HW design requirements and care-abouts are critical to be successful in this role. This role will be critical in defining requirements of future ATE tester roadmap, driven by product roadmaps and definitions.

• Drive state-of-the-art DfTs and BiST solutions targeted for coverage, quality, maximum multi-site, and lowest cost-of-test with focus on Dft-Max (digital SOCs, IPs, NVM memories, HSIO, analog/mixed signal, and RF products).
• Drive test methods, test-flows, and quality screens for various NVM memory types.
• Define new ATE platforms to support roadmap products (based on 5-10yr product roadmaps).
• Define and develop Test Method Libraries enabling standardization and sameness across products and ATE platforms.
• Knowledge of High Speed Interfaces (PCIe, LVDS, CSI, DSI, QSPI, DDR, HDMI, USB, etc.), Power Management, massive multi-site, and/or I/Ps requiring Safety & Security is considered a HUGE PLUS.
• The candidate, in this role, is expected to learn protocols and industry standards for these high speed interfaces, define test methods for high-volume production testing with high parallelism, and build / code ATE test-plans for characterization and production testing.
• Ownership will include both DfT definitions for both IPs and SOCs.
• Define Production Test Flows across test insertions, driven towards best coverage and lowest cost-of-test.
• Define Process and Silicon Characterization requirements, for NPDE teams to follow during their product validation and execution.
• Responsible for setting ATE HW strategy for both both Probe and Final Test, including integration, validation, and qualification / factory buyoff of proposed ATE HW solutions (handler, prober, sockets, etc).
• Owner and liaison between BU PE and Factory on validating HW/SW at factory installed test cells (including temperature test capabilities).
• Identify / document gaps, best practices, and lessons learned and feedback to Design, DfT, and PE NPDE / Cost Entitlement teams, to drive for better processes and test methods for future products.

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Good IC and test knowledge and background, across digital, analog, and mixed-signal, along with knowledge of ATE platforms, DfT strategies and test methods, and test instrumentation requirements for various Analog, Mixed-Signal, and Digital tests. Candidate must be familiar with protocols and industry standards for various IPs (high speed interfaces, analog and mixed-signal circuits, etc.).

Prior experience working DfT, ATE Test Equipment for IC testing, and good hands-on knowledge across digital, analog, and RF is a must. Candidate must work closely with various cross-functional teams, including Design, Design DfT, and NPDE PE teams, with intent to direct, guide, and influence various aspects of product development in these shops.

MSEE / BSEE with minimum 15-20+ yrs of experience working Product / Test and atleast 10yrs+ of working DfT and BiST strategies across digital, RF, and analog/mixed signal products. Must have management experience of at least 10+ yrs. Experience working with ATE platforms and defining ATE roadmap solutions (full test cell definitions). Strong track record of enabling and bringing…