Principal Design Engineer, HBM Architecture

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The HBM Architecture team develops advanced datapath solutions that enable industry‑leading bandwidth, power efficiency, reliability, and scalability for Micron’s next‑generation High Bandwidth Memory (HBM) products. The team collaborates closely across design, PHY, ECC, verification, layout, and system groups to drive innovative logic‑die and core‑die architectures from concept through production.

We are seeking a highly motivated HBM Datapath Engineer to architect, design, and optimize high‑speed data paths for next‑generation High Bandwidth Memory (HBM) products! This role focuses on logic‑die and core‑die datapath circuitry, enabling industry‑leading bandwidth, power efficiency, reliability, and scalability across JEDEC and custom HBM solutions. The ideal candidate will work closely with design, PHY, ECC, verification, layout, and system teams to deliver robust datapath designs from concept through silicon bring‑up and production.

Responsibilities will include, but are not limited to:

Architect and design HBM read and write datapath across core and logic die, including alignment, buffering, timing, and control logic

Develop high‑speed, low‑latency datapath circuits supporting multi‑channel HBM architectures and wide internal buses

Optimize datapath designs for bandwidth, power, area, and timing closure at advanced technology nodes

Design and integrate data reliability features, including parity, ECC hooks, lane redundancy, and remapping mechanisms

Collaborate with multi-functional teams to translate specifications into robust micro‑architectures

Collaborate with PHY, DFT, verification, and layout teams to ensure accurate functionality, testability, and manufacturability

Drive schematic‑level and RTL‑level datapath implementations, including clocking, gating, and reset strategies

Contribute to design reviews, documentation, and technical mentoring across HBM programs

Leveraging AI tools to efficiently carry out regular work

Required Qualifications:

Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field with 7+ years of relevant industry experience, or a Master’s degree with 5+ years of relevant industry experience.
3+ years of experience in high‑speed digital datapath design (memory, Ser Des, or SoC datapath).2+ years of hands‑on experience with digital schematic build, RTL, or mixed‑signal datapath implementations.

Preferred Qualifications:

Strong understanding of HBM/DRAM architectures, including read/write data flow, timing, and multi‑channel operation.

Working knowledge of layout and floor planning considerations for high‑speed datapath.

Experience with static timing analysis (STA) and timing‑closure methodologies.

Familiarity with advanced process‑node challenges related to signal integrity, skew control, and power optimization.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.  We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.  

Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.  Additionally, Micron benefits include a robust paid time-off program and paid holidays.  For additional…