Senior HBM Memory Architect; 3D-Stacked DRAM

Micron Technology, Inc. is seeking an HBM Memory Design Engineer to design, simulate, and floorplan digital and analog DRAM circuits used in advanced HBM technology.

You will collaborate with cross-functional teams to deliver high‑performance, low‑power memory solutions across 3D stacking and TSV integration. The role requires a strong background in CMOS circuit design with 7+ years (or 5+ years with an MSEE) and hands-on experience with HSPICE or Fine Sim for circuit verification, along with

This is a genuine opening to take on the Senior HBM Memory Architect (3D-Stacked DRAM) role at Micron Technology.

The Senior HBM Memory Architect (3D-Stacked DRAM) position in the IT & Technology, Engineering field is open for applications.

We have an opening for a Senior HBM Memory Architect (3D-Stacked DRAM) in Richardson, TX, United States within IT & Technology, Engineering.