Senior ASIC Digital Architect: RTL, Synthesis & Tape

Micron Technology is seeking a Principal ASIC Design Engineer to own digital RTL architecture, verification readiness, and collaboration with layout and mixed-signal teams in a high-speed PHY context. The role emphasizes leadership in design intent, CDC analysis, and end-to-end implementation from RTL to physical realization.

Candidates should have 7–12 years of ASIC experience, solid System Verilog, and hands-on use of Design Compiler/Genus, Prime Time/Tempus, and advanced GPU-friendly EDA tools.

We are seeking a motivated Senior ASIC Digital Architect: RTL, Synthesis & Tape-out to join Micron Technology, Inc. in Richardson, TX, United States.

For the Senior ASIC Digital Architect: RTL, Synthesis & Tape-out position at Micron Technology, Inc., we are reviewing applications now.

Step into the Senior ASIC Digital Architect: RTL, Synthesis & Tape-out role at Micron Technology, Inc. in Richardson, TX, United States and grow with us.