ASIC Verification Engineer Broadcom

Position: ASIC Verification Engineer with Broadcom
Transform the future of ASIC design at Broadcom as a Verification Engineer. Harness your skills in System Verilog and UVM to excel in a cutting-edge technology environment.
We invite applications for the ASIC Verification Engineer role s position involves verifying designs using industry-standard constrained random methodologies within a skilled team. You will work primarily on PCIe and related interfaces to contribute to the development of advanced technology in an ever-evolving market, with opportunities for personal and professional growth.

Key Responsibilities:

• Perform design verification through advanced methodologies

• Collaborate with experienced engineers on ASIC projects

• Ensure coverage closure for thorough verification

• Employ System Verilog and UVM in lab settings

• Contribute to innovative design practices and solutions
Requirements:

• Minimum BSEE with 8+ years or MSEE with 6+ years

• Strong experience in System Verilog and UVM

• Understanding of PCIe and related design flows

• Familiarity with datapath flows

• Self-motivated, with teamwork capabilities
Bring your expertise in verification to Broadcom and play a vital role in shaping next-generation ASIC designs.
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