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Principal FPGA Design Engineer

Job in 2280, Rijswijk, South Holland, Netherlands
Listing for: SiTime
Full Time position
Listed on 2026-06-18
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Test Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 EUR Yearly EUR 80000.00 100000.00 YEAR
Job Description & How to Apply Below
Job Summary
We are seeking an FPGA Architect with at least 10 years of experience to lead design and development of FPGA-based platforms supporting internal testing and validation of our precision MEMS timing products. The role is critical to building infrastructure for frequency measurement, low phase noise and low jitter characterization, production, and system-level validation.

Responsibilities

Architect and implement scalable FPGA solutions for internal hardware platforms used in MEMS timing product testing.

Lead cross‑functional technical initiatives involving CMOS design, MEMS design, systems and test engineering, validation, and production teams.

Define and drive system‑level requirements, ensuring alignment across hardware, software, and test domains.

Own the full FPGA lifecycle: architecture, RTL design, simulation, synthesis, timing closure, and bring‑up.

Develop reusable IP blocks and maintain a modular, maintainable FPGA infrastructure.

Champion design reviews, documentation standards, and continuous improvement practices.

Provide technical leadership and mentorship to junior engineers and influence strategic direction across multiple programs.

Act as a key technical liaison between engineering, product, and operations teams to ensure seamless integration and execution.

Qualifications & Requirements

MS in Electrical Engineering, Computer Engineering, or related field.

10+ years of hands‑on FPGA architecture and development experience (Xilinx, Intel/Altera, or similar).

Deep expertise in Verilog/VHDL, simulation tools (Model Sim, Vivado, etc.) and scripting (Python, TCL).

Proven track record in designing systems with low jitter, low phase noise, and high signal fidelity.

Strong understanding of timing analysis, clock domain crossing, and high‑speed interfaces (PCIe, DDR, SERDES).

Experience with lab bring‑up, debugging tools (logic analyzers, oscilloscopes), and test automation.

Demonstrated leadership in driving cross‑functional initiatives and delivering complex technical programs.

Excellent communication, collaboration, and stakeholder management skills.

Preferred Qualifications

Experience in MEMS or timing product domains.

Familiarity with hardware/software co‑design and embedded systems.

Exposure to production test environments and ATE systems.

Experience presenting technical strategies and outcomes to executive leadership.

Compensation
We offer a comprehensive and highly competitive compensation package that includes base salary, a quarterly bonus tied to innovation goals, and equity grants.

Equal Opportunity Employer
SiTime is an Equal Opportunity Employer. We treat each person fairly and do not tolerate discrimination or harassment on the basis of any protected characteristics. SiTime participates in the E‑Verify program.

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