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Senior Layout Design Engineer - CMOS​/BiCMOS Leader

Job in 2280, Rijswijk, South Holland, Netherlands
Listing for: Qabird
Full Time position
Listed on 2026-07-24
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 113844 - 148874 EUR Yearly EUR 113844.00 148874.00 YEAR
Job Description & How to Apply Below

SiTime is seeking a Sr Layout Design Engineer to lead top-level chip-planning and block-level layouts for CMOS and BiCMOS devices. You will coordinate with offshore design teams, train junior engineers, and contribute to standard layout methodologies and build processes to ensure high-quality layouts.

The role requires extensive experience with analog and full-custom digital blocks, Cadence Virtuoso, and DRC/LVS/ERC validation. Occasional collaboration across global centers is expected.

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Position Requirements
10+ Years work experience
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