Senior ASIC Lead — Mixed-Signal & Tapeout
Listed on 2026-10-30
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Engineering
Electronics Engineer, Operations Management, Hardware Engineer, Systems Engineer
Teradyne's Silicon Technology Engineering team is seeking an experienced Senior ASIC Chip Lead / Project Lead to drive the development and delivery of a large-scale mixed-signal ASIC for next-generation Automated Test Equipment systems.
The ideal candidate will coordinate cross-functional engineering teams, external partners, and stakeholders while balancing schedule, cost, and quality to ensure successful tapeout readiness and silicon bring-up.
This is a strong position to take on the Senior ASIC Lead — Mixed-Signal & Tapeout role at Teradyne.
This role, Senior ASIC Lead — Mixed-Signal & Tapeout at Teradyne, could be your next move.
Are you ready to take on the Senior ASIC Lead — Mixed-Signal & Tapeout role at Teradyne?
We would love to welcome a new Senior ASIC Lead — Mixed-Signal & Tapeout to our group in CA, United States.
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