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Systems Engineer Electronics Engineer

Senior Digital Design Engineer — FPGA​/ASIC RTL Lead

Job in Riyadh, Riyadh Region, Saudi Arabia
Listing for: Skydrop
Full Time position
Listed on 2026-05-11
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 200000 - 300000 SAR Yearly SAR 200000.00 300000.00 YEAR
Job Description & How to Apply Below
Skydrop is seeking an experienced Digital Design Engineer to lead RTL design and verification for digital subsystems. In this role, you'll impact the development and execution of high-performance designs in FPGA and ASIC environments. Candidates should have 5-10 years of experience, strong proficiency in System Verilog and/or VHDL, and an expert understanding of synchronous design principles. A command of timing closure and debugging skills is essential, and experience mentoring junior engineers is desired.
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Position Requirements
10+ Years work experience
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