Junior Hardware Engineer - Pathway to Innovation Security Clearance

Position: Junior Hardware Engineer - Pathway to Innovation with Security Clearance
Requisition Number: 26421 Required Travel: 0 - 10%

Employment Type:

Full Time/Salaried/Exempt Anticipated Salary Range: $ - $ Security Clearance:
Ability to Obtain Level of

Experience:

Mid This opportunity resides with Warfare Systems (WS), a business group within HII's Mission Technologies division. Warfare Systems comprises cyber and mission IT; electronic warfare; and C5

ISR systems. HII works within our nation's intelligence and cyber operations communities to defend our interests in cyberspace and anticipate emerging threats. Our capabilities in cybersecurity, network architecture, reverse engineering, software and hardware development uniquely enable us to support sensitive missions for the U.S. military and federal agency partners. Meet HII's Mission Technologies Division
Our team of more than 7,000 professionals worldwide delivers all-domain expertise and advanced technologies in service of mission partners across the globe. Mission Technologies is leading the next evolution of national defense - the data evolution - by accelerating a breadth of national security solutions for government and commercial customers. Our capabilities range from C5

ISR, AI and Big Data, cyber operations and synthetic training environments to fleet sustainment, environmental remediation and the largest family of unmanned underwater vehicles in every class. Find the role that's right for you. Apply today. We look forward to meeting you. To learn more about Mission Technologies,  for a short video:  

Job Description Do you enjoy challenging digital design verification problems? Do you enjoy tinkering and learning how things work? HII Mission Technologies (HII MT) is seeking talented engineers who are excited to work in a flipped engineering environment. Our team in Roanoke, VA specializes in reverse engineering and microelectronics trust and assurance. HII Mission Technologies is seeking out-of-the-box thinkers who can uncover difficult-to-activate corner-case bugs and vulnerabilities in the gate-level netlists of FPGA and ASIC designs.

Candidates for this position will contribute to the team by utilizing industry-standard functional verification tools (e.g., Questa, VCS, Verdi), logical equivalence tools (e.g., One Spin 360EC), and proprietary software tools to verify design function and integrity. Common verification targets include embedded processors, DSPs, filters, transceivers, data links, systems-on-chip, and decoders. Experience in the cybersecurity, electronic warfare, encryption, radar, and/or satellite communications domains is a plus.

Essential

Job Responsibilities
* Candidates for this position will contribute to reverse engineering efforts on systems of interest and support the development of innovative solutions.
* Successful candidates will be expected to communicate clearly and effectively, and demonstrate the ability to design maintainable approaches to complex technical problems.
* Candidates will develop models, transactors, stimuli, monitors, and test benches for simulating and uncovering hidden behaviors in gate-level digital netlists.
* Candidates will be expected to produce clear documentation and test cases demonstrating identified bugs or deviations from the specification.
* Effective collaboration with teammates to produce cohesive results and create improved processes is required.
* Candidates must be U.S. citizens and be willing and able to obtain a DoD security clearance (if not already cleared).

Minimum Qualifications You will meet our minimum qualifications if you...
* Are a United States citizen with the ability to obtain and maintain a DoD security clearance (Secret-Top Secret/SCI)
* Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
* Experience with modern digital verification and modeling languages:
System Verilog, System

C, C/C++, Matlab, etc.
* Directed, constrained-random, and assertion-based verification techniques at the gate, interface, and transaction levels
* Experience with modern, commercial-grade, functional simulators (e.g., Xcelium, Incisive, Questa, VCS, Riviera-Pro, etc)
* Writing scripts for batched verification tasks:
Python, Bash, Tcl, make files.
* Revision control systems for maintaining, sharing, and deploying code:
Perforce, git, SVN, etc.
* Familiarity with debugging and isolating issues with gate-level netlists
* 5 years relevant experience with Bachelors in related field; 3 years relevant experience with Masters in related field Preferred Requirements You will go above and beyond if you...
* Already possess an active Top Secret security clearance and/or be eligible to obtain a higher-level clearance as required
* Familiarity with object-oriented, embedded, assembly, or machine code programming
* Software or hardware reverse-engineering (e.g., IDA Pro, Ghidra)
* FPGA design or verification
* Familiarity with testing and verification techniques for IC trust, assurance, or security
* Experience with logical equivalence checkers…