Analog Design Intern: -Speed SerDes & PAM
Listed on 2026-10-15
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Engineering
Electronics Engineer
IBM is seeking Analog Design Interns to join the team delivering high-speed SERDES interfaces for Power and Z processors in advanced 3nm technologies and beyond.
You will use Cadence and SPICE tools to design, simulate, and layout circuits, work on transmitter/receiver/PLL blocks, and develop Python scripts for data parsing while learning manufacturability and end-of-life considerations.
Our team is growing, and we are hiring a Analog Design Intern:
High-Speed Ser Des & PAM4 in Rochester, MN, United States.
Join us at IBM as our next Analog Design Intern:
High-Speed Ser Des & PAM4 in Rochester, MN, United States.
We are currently recruiting a Analog Design Intern:
High-Speed Ser Des & PAM4 for our team in Rochester, MN, United States.
This is an excellent opportunity to take on the Analog Design Intern:
High-Speed Ser Des & PAM4 role at IBM.
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