ASIC Intern

ASIC Intern This role has been designed as 'Hybrid' with a requirement that you will work on average 2 days per week from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next.

We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Aruba, a Hewlett Packard Enterprise Company, is a leading provider of next-generation networking solutions for the mobile enterprise:  We have an exciting opportunity for a ASIC Post-Si Verification Engineering Intern to join our team in Roseville, CA. The company designs and delivers Mobility-Defined Networks that empower IT departments and #Gen Mobile, a new generation of tech-savvy users who rely on their mobile devices for every aspect of work and personal communication.

To create a mobility experience that #Gen Mobile and IT can rely upon, Aruba Mobility-Defined Networks™ automates infrastructure-wide performance optimization and triggers security actions that used to require manual IT intervention. The results are dramatically improved productivity and lower operational costs.

The intern will be working with the HPE Aruba ASIC development team on next generation products. You will have a summer project that will be used for/in the development activities of current or future ASIC's. This ASIC team develops state of the art, world class Networking Chips for the marketplace and our customers. We are looking for individuals that have the desire and ability to contribute at this level.

The intern will be working with and learning from the senior members of the ASIC / VLSI team. Responsibilities may include RTL/Physical Design, Pre-Silicon verification;
Post-Silicon verification;
Formal Verification;
Script & Tool development; schedule breakdowns, document generation, and several other possible duties. Several assignments are possible, so final alignment will be based on student skills and business needs.

• RTL/Physical Design
• Pre-Silicon verification
• Post-Silicon verification
• Formal Verification
• Script & Tool development
• Schedule breakdowns, document generation, and several other possible duties

Currently pursuing a Bachelor's or Master's degree in Computer Engineering, Computer Science, Electrical Engineering or a related technical field. At least 3rd Year of engineering courses completed.

Basic programming or scripting knowledge (e.g., Verilog, System Verilog Python, PERL, TCL, C, C++). Experience with hardware design Strong interest in high-tech and a passion for learning. Excellent communication and interpersonal skills. Strong problem-solving and analytical skills. Ability to work within a team environment Impact/Scope:
University students actively enrolled in a university/college/institution pursuing a Bachelor's degree in a technical area of study, and who typically works during school breaks and then returns to their university. While this applies to most interns, there may be opportunities for full-time students to work as part‑time interns during the school year in some countries.

HPE is committed to creating an inclusive and accessible workspace and encourages applications from…