Hybrid ASIC Verification Intern
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Engineering
Job Description & How to Apply Below
Hewlett Packard Enterprise Company in Roseville, CA is seeking an ASIC Post-Si Verification Engineering Intern. The role supports RTL/Physical Design, Pre-/Post-Silicon verification, and tool development within the ASIC/VLSI team.
You will learn from senior engineers and contribute to multiple assignments based on your skills. The position is designed for students pursuing a Bachelor’s or Master’s in a technical field, with at least 3 years of engineering coursework completed, and a strong
This posting is for the Hybrid ASIC Verification Intern role at Hewlett Packard Enterprise Company, based in Roseville, CA, United States.
All applications are reviewed carefully by our team.
The position is based in Roseville, CA, United States.
This opportunity is part of our work in Bio & Pharmacology & Health, Engineering.
The advertised compensation is 48.000 - 56.000.
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