Hybrid ASIC Verification/Design Intern
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Engineering
Job Description & How to Apply Below
HPE Aruba Networking in California is seeking a university intern to work with the ASIC development team on next-generation networking chips. The internship includes hands-on RTL/Physical Design and verification tasks. You will learn from senior engineers and contribute to the team’s efforts in a fast-paced setting.
As an intern, you will engage in pre- and post-silicon verification, scripting and tool development, and collaborate across disciplines to meet project milestones.
Our group is growing, and we are hiring a Hybrid ASIC Verification/Design Intern in Roseville, CA, United States.
This is a strong position to take on the Hybrid ASIC Verification/Design Intern role at HPE Aruba Networking.
As a Hybrid ASIC Verification/Design Intern, you will play an important part at HPE Aruba Networking in Roseville, CA, United States.
We invite applications for the Hybrid ASIC Verification/Design Intern position located in Roseville, CA, United States.
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