ASIC Verification & Hardware Design Intern
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Engineering
Job Description & How to Apply Below
HPE Aruba Networking in Roseville, CA is offering an ASIC Post-Si Verification Engineering Intern position. You will join the ASIC development team on next generation products, contributing to RTL/Physical Design and verification tasks with senior engineers.
The internship includes a summer project aligned with current and future ASIC efforts. The program targets students pursuing a bachelor's or master's in a technical field, typically completing at least the third year of study.
This posting is for the ASIC Verification & Hardware Design Intern role at HPE Aruba Networking, based in Roseville, CA, United States.
We are looking to fill the ASIC Verification & Hardware Design Intern position at HPE Aruba Networking in Roseville, CA, United States.
The ASIC Verification & Hardware Design Intern role at HPE Aruba Networking is now open for applications in Roseville, CA, United States.
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