Senior ASIC Verification Engineer – Lead VLSI Innovation
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Engineering
Job Description & How to Apply Below
Hewlett Packard Enterprise Development LP in Roseville, California, is looking for a Senior ASIC Verification Engineer to lead VLSI design projects. This role requires extensive experience in VLSI design and validation, as well as scripting and programming skills.
The ideal candidate will possess a Bachelor's or Master's degree in Electrical or Computer Engineering, and over 10 years of relevant experience. The position offers competitive salary and benefits, including professional development and health wellness programs.
This posting is for the Senior ASIC Verification Engineer – Lead VLSI Innovation role at Hewlett Packard Enterprise, based in Roseville, CA, United States.
The Senior ASIC Verification Engineer – Lead VLSI Innovation role at Hewlett Packard Enterprise is now open for applications in Roseville, CA, United States.
Join us at Hewlett Packard Enterprise as our next Senior ASIC Verification Engineer – Lead VLSI Innovation in Roseville, CA, United States.
Position Requirements
10+ Years work experience(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
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