Principal VLSI Physical Design Engineer
Listed on 2026-11-05
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Engineering
Electronics Engineer, Electrical Engineering, Systems Engineer, Engineering Design & Technologists
TSMC is seeking a Principal Engineer in California to lead physical design activities for advanced processing technologies. You will work on block level floor planning, clock tree synthesis, place-and-route, RC extraction, STA, and timing closure with standard EDA tools and scripting.
The role requires a bachelor's degree in Electrical or Electronic Engineering and at least five years of related experience, including full-cycle physical design and PPA analysis of CPU blocks in N7/N5 and below.
Are you ready to take on the Principal VLSI Physical Design Engineer role at TSMC?
If your experience matches this role, we encourage you to apply.
All applications are reviewed carefully by our team.
The position is based in CA, United States.
This opportunity is part of our work in Engineering.
The advertised compensation is 219..
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