Lead Design and Analysis Engineer

Job Description At Boeing, we innovate and collaborate to make the world a better place. We’re committed to fostering an environment for every teammate that’s welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.

Position Responsibilities:

Leads work with customers to develop and document electronic and electrical system requirements on complex multi-tiered projects

Leads analysis and translation of complex requirements into system architecture, hardware and software designs, and interface specifications

Leads testing and validation work on complex system designs to assure that operational and functional requirements are met

Works with others to develop program test strategies

Manages performance of critical suppliers to ensure system integration and compliance with requirements

Conducts program independent reviews and reports results to program leadership

Provides critical support of fielded hardware and software over the entire product lifecycle

Leads research into technology advances for potential application to company business needs

Makes recommendations for technology investments

Recognized as a business unit-wide expert in process development and qualification, physical and functional integration and installation, design, and resolving supplier technical issues.

Basic Qualifications (Required Skills and Experience):
Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement

14+ years of related work experience and a bachelor’s degree or an equivalent combination of related work experience and technical education

Preferred Qualifications (Desired Skills and Experience):
Experience in Open Mission Systems (OMS) development

Experience in Model Based System Engineering (MBSE) development

Familiarity with Universal Command and Control Interface (UCI) message standard and Common Abstraction Layer (CAL)

Experience with system design and development, including component interactions, interfaces, and overall system functionality

Experience with requirements development and management, including technical performance specification and statement of work development

Experience with NSA C2 and NCDSMO interactions and certification processes

Experience with Multi-level Security Networks

Experience with Multi-level Security Embedded Systems

Experience with Cryptographic units, Cross Domain Solutions/Guards including access CDS and transfer CDS

Knowledge of 3U and 6U VPX/OpenVPX architectures:
This includes the VITA 46 and VITA 65 standards, appreciating the distinct advantages and trade-offs of each form factor in terms of size, weight, power (SWaP), processing capability, and I/O density

Knowledge of Signal Integrity & Interconnect:
Expertise in high-speed digital signal design, including impedance matching, managing signal integrity, and utilizing advanced interconnect solutions like VPX3's discrete coaxial/twinax cabling is highly valued

Experience with High-Performance Embedded Computing (HPEC):
How to integrate and optimize performance for demanding workloads within the constraints of 3U and 6U form factors

Experience with hardware design and development, encompassing all phases of the product lifecycle from initial design to flight maturity

Experience with hardware-in-the-loop (HIL) simulations and testing methodologies to verify system functionality

Experience with designing secure architectures, implementing cryptographic protocols, secure boot processes, firmware validation, and secure communications

Experience with Open Architecture Standards:
Familiarity with standards like SOSA (Sensor Open Systems Architecture), which leverages VPX standards

Experience with Mezzanine Card Utilization:
Understanding how mezzanine cards (e.g., XMC) can enhance functionality and scalability within 3U and 6U VPX systems

Experience with 3U/6U FPGAs, GPU, and CPUs

Conflict of Interest:
Successful candidates for this job must satisfy the Company’s Conflict of Interest (COI) assessment process. Relocation:
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