FPGA Engineer

Job Title: FPGA Engineer

We are seeking an experienced FPGA Engineer to design and develop advanced FPGA solutions for a next-generation satellite communication system. This is a unique opportunity to contribute to the development of cutting-edge networking technology with minimal legacy constraints. You will work closely with system architects and cross-functional engineering teams to define, implement, validate, and release FPGA-based solutions supporting high-performance communication systems.

• Own the development and delivery of one or more FPGA bitstreams.
• Design, develop, and implement complex FPGA architectures using Verilog HDL.
• Lead FPGA development across the complete lifecycle, including:
• Microarchitecture
• RTL Design
• Physical Implementation
• Timing Closure
• Simulation & Verification
• Lab Validation
• Production Release
• Develop FPGA-based networking and digital communication functions.
• Collaborate with system architects, hardware engineers, firmware, and software teams to implement and validate FPGA solutions.
• Build FPGA prototypes to evaluate architecture and design tradeoffs.
• Support hardware bring-up, system integration, and debugging involving FPGA, RF, firmware, and networking components.
• Perform synthesis, place & route, timing analysis, and design optimization.
• Develop comprehensive test benches and simulation environments.
• Debug FPGA designs in both simulation and hardware environments.
• Drive design tradeoff analysis focused on performance, power, cost, area, and customer experience.
• Create technical documentation including design specifications, verification plans, and test documentation.
• Support manufacturing, production deployment, and post-release engineering activities.

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
• 7+ years of hands-on FPGA design experience.
• Strong expertise with Verilog HDL for RTL design and verification.
• Experience designing with AMD Xilinx Versal ACAP FPGA architecture.
• Experience working with Microchip IGLOO2 FPGA platforms.

• Xilinx Vivado
• Microchip Libero SoC

• Digital logic design
• Timing analysis and timing closure
• Clock Domain Crossing (CDC)

• Model Sim
• Vivado Simulator
• VCS (or equivalent)

• Experience using scripting languages such as Python, TCL, or Perl for design automation.
• Strong debugging, analytical, and problem-solving skills.
• Understanding of industry-standard communication protocols.

• Experience with System Verilog and UVM verification methodologies.
• Experience with high-speed interfaces including:
• PCIe
• DDR
• Ethernet
• Ser Des
• Familiarity with embedded systems and hardware/software integration.
• Experience using version control systems such as Git or SVN.
• Background in digital communications, networking, or signal processing.
• Experience working with DO-254 or other safety-critical design standards.

• HDL
  
  Languages:
  
  Verilog (required), System Verilog (preferred)
• FPGA Platforms: AMD Xilinx Versal ACAP, Microchip IGLOO2
• Design Tools:
  Vivado, Libero SoC
• Simulation:
  Model Sim, Vivado Simulator, VCS (or equivalent)
• Scripting:
  Python, TCL, Perl
• Version Control:
  Git, SVN
• Protocols:
  Industry-standard communication protocols
• Design Expertise: RTL Design, FPGA Verification, Timing Closure, CDC Analysis, Physical Implementation, Hardware Bring-up

GCS is acting as an Employment Business in relation to this vacancy.