Principal IC Packaging Engineer

Company:

Qualcomm Technologies, Inc.

Engineering Group, Engineering Group >
Packaging Engineering

We are seeking a highly motivated Principal IC Packaging Engineer to lead the development of advanced integrated circuit (IC) packaging technologies. This role focuses on spearheading new product introductions for cutting-edge package technologies, particularly targeting Data Center AI, Power Management, and emerging markets. The engineer will drive innovation from initial concept through to high-volume manufacturing (HVM) at assembly suppliers. This position demands in-depth expertise and experience in a variety of advanced packaging methods, including Redistribution Layer (RDL) packages, wafer bonding, flip chip, wire bond, and System in Package (SiP) assembly processes.

Proficiency in materials and equipment relevant to these technologies is essential. Additionally, the role requires the ability to lead multi-disciplinary teams, manage relationships with multiple Outsourced Semiconductor Assembly and Test (OSAT) providers, and resolve complex technical challenges that arise during development and manufacturing.

• Provide leadership and take responsibility for the development of advanced packaging technologies, including wafer bonding, RDL, 3D, wafer dicing, and 2.5D packaging.
• Oversee new product introductions and ensure smooth transition to high-volume manufacturing.
• Leverage subject matter expertise in package architecture, high-density interconnect package design, as well as performance, reliability, and cost constraints.
• Apply hands‑on experience in packaging assembly processes, materials, equipment, and adherence to design rules.
• Collaborate with and manage multiple foundries and OSATs to advance packaging solutions from concept to full-scale production.
• Lead cross-functional teams and manage multiple concurrent programs.
• Resolve complex technical issues encountered throughout the development and manufacturing process.

• M.S. or Ph.D. in Mechanical, Electrical, or Materials Engineering, or equivalent experience.
• Seventeen or more years of hands‑on experience in packaging technology development, specifically in 2.5D/3D for high‑density die‑to‑die (D2D) interconnects, RDL, fan‑out bridges, FCBGA, MCM, and related disciplines.
• Comprehensive understanding of semiconductor industry packaging trends, end‑user packaging requirements, and prior experience with high‑performance computing products.
• Familiarity with reliability standards, test methods, qualification procedures, and failure analysis techniques.
• Knowledge of substrate manufacturing processes and design rules.
• Excellent verbal and written communication skills.
• Demonstrated ability in organized technical project management.
• Ability to work independently and lead multiple programs simultaneously.
• Proven capability to lead multi‑functional teams and resolve complex technical problems.
• Familiarity with working alongside contract manufacturers (CM) on data center and rack design is considered an advantage.

• Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 8+ years of System/Package Design/Technology Engineering or related work experience.
• Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 7+ years of System/Package Design/Technology Engineering or related work experience.
• Ph.D. in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 6+ years of System/Package Design/Technology Engineering or related work experience.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail disability‑ or call Qualcomm’s toll‑free number.

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