DFT STA Constraints Engineer

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Arm’s Solutions group DFT team implements DFT for SOC for client, datacenter, automotive, and IoT line of business using the latest technology. We collaborate with internal teams throughout the entire project life cycle, from early investigation to tape‑out and silicon test/characterization on ATE.

We are currently hiring for three locations:
San Jose, Austin, and San Diego.

• Lead DFT design and STA constraints to meet design PPA targets.
• Coordinate DFT requirements across SOC, IP, and product teams.
• Architect, implement, and validate innovative DFT techniques on SOCs and subsystems.
• Insert DFT logic into SoC and subsystems and validate all DFT features using industry standard simulation tools.
• Work closely with multi-functional teams to support DFT RTL level insertion, synthesis and scan insertion, place‑and‑route, and static timing analysis and timing closure.
• Participate in ATE targeted test patterns, validation, and silicon‑debug.
• Collaborate with Test and product engineering teams on silicon characterization and validation.

• Principal DFT Engineer / DFT STA Constraints Lead with 10+ years of experience in Design for Test.
• Understanding of DFT timing signoff modes and constraints and familiarity with synthesis and static timing analysis.
• Experience validating and supporting DFT timing constraints in Synopsys Prime Time, Innovus, Fusion compiler, and Geuns.
• Core DFT skills: experience with Siemens DFT tool, DFT timing constraints, streaming scan networks, scan compression and insertion, memory BIST, repair scheme implementation, logic BIST, JTAG, at‑speed test, ATPG, fault simulation, gate‑level verification, silicon debug, memory and scan diagnostics.
• Experience coding Verilog RTL, TCL, and/or Perl.

• Familiarity with SoC style architectures including multi‑clock domain and low‑power design practices.
• Familiarity with Arm IP such as Cortex CPUs, Mali GPUs, AMBA protocols, Core Link interconnects, Core Sight debug.
• Background in high‑performance design, implementation, and timing convergence.
• Experience with 2.5D and 3D test.
• Experience with Cadence and/or Synopsys DFT and simulation tools.
• Ability to collaborate on a team and independently.
• Innovative mindset and passion for progress.
• Hard‑working with excellent time management and ability to multi‑task.
• Upbeat approach to pushing ambitious projects at the cutting edge.
• Strong communication across teams and sites in different geographies and time zones.
• Good analytical and debug skills with "figure it out" mentality.

$191,100 - $258,500 per year

We want to build extraordinary teams. If you need accommodations during recruitment, please email  Your request will be treated confidentially.

We design hybrid working to support high performance and personal wellbeing. Flexibility depends on local regulations and team needs.

Arm is an equal opportunity employer committed to a respectful environment where equal opportunities are available to all applicants and colleagues. We do not discriminate on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or veteran status.

Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work:

Associate

Full‑time

Engineering and Information Technology

Semiconductor Manufacturing, Software Development, Computer Hardware Manufacturing