Principal DFT Engineer

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Arm’s Solutions group DFT team implements DFT for SOC for client, datacenter, automotive, and IOT line of business using the latest DFT and process technologies. We closely collaborate with Arm’s partners and internal RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape‑out and silicon test/characterization on ATE.

We are currently hiring across three locations:
San Jose, Austin, and San Diego.

• Architect DFT solutions for SOC catering to multiple line of business
• Coordinate DFT requirements across SOC, IP and product teams
• Implement and validate innovative DFT techniques on SOCs and sub‑systems
• Insert DFT logic into SoC as well as sub‑system level and validate all DFT features using industry standard simulation tools
• Work closely with multi‑functional teams to support DFT RTL level insertion, synthesis and scan insertion, place‑and‑route, and static‑timing‑analysis and timing closure
• Participate in ATE targeted test patterns, validation and silicon‑debug
• Work closely Test and product engineering teams on silicon characterization and validation

• 12+ years of confirmed experience in Design for Test, as a Principal DFT Architect
• Proven experience handling DFT architecture for complex SOCs in leading technology nodes
• Core DFT skills:
  Siemens DFT tools, Streaming Scan Network (SSN), Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at‑speed test, ATPG, fault simulation, DFT mode timing constraints, back‑annotated gate level verification, silicon debug, memory and scan diagnostics
• Experience with 2.5D and 3D test
• Experience coding Verilog RTL, TCL and/or Perl

• Familiarity with SoC style architectures including multi‑clock domain and low power design practices
• Familiarity with Arm IP:
  Cortex CPUs, Mali GPUs, AMBA protocols, Core Link interconnects, Core Sight debug
• Background in high performance design, implementation and timing convergence
• Experience leading datacenter SOCs
• Experience with Cadence, and/or Synopsys DFT and simulation tools
• Ability to work collaboratively and independently
• Innovative spirit and passion for progress
• Hard‑working with excellent time management and multi‑tasking skills
• Upbeat approach to ambitious projects on cutting‑edge technology
• Effective communication across teams and sites in different geographies and time zones

$241,100‑$326,100 per year

We provide accommodations during the recruitment process. Email

Hybrid working is designed to support high performance and personal wellbeing. Details will be shared upon application.

Arm is an equal opportunity employer committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and we do not discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability or status as a protected veteran.