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Lead ASIC DFT Architect

Job in San Diego, San Diego County, California, 92189, USA
Listing for: Sapsol Technologies Inc
Full Time position
Listed on 2026-10-09
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 180000 - 240000 USD Yearly USD 180000.00 240000.00 YEAR
Job Description & How to Apply Below

Sapsol Technologies Inc is seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASICs and SoCs. You will own DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation.

The ideal candidate will lead cross-functional debug efforts, drive fault coverage closure, and mentor junior engineers while developing automation scripts in TCL, Perl or Python to improve flow efficiency and

The Lead ASIC DFT Architect role at Sapsol Technologies Inc is now open for applications in United States.

Our group is growing, and we are hiring a Lead ASIC DFT Architect in United States.

This Full Time opportunity is for the Lead ASIC DFT Architect role at Sapsol Technologies Inc.

We are seeking a motivated Lead ASIC DFT Architect to join Sapsol Technologies Inc in United States.

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