Senior NoC/SoC ASIC Design Engineer - Verilog & Python
Listed on 2026-10-13
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Engineering
Hardware Engineer, Test Engineer, Electronics Engineer
Wipro Limited in Mountain View, California, is seeking an experienced Senior ASIC / SoC NoC Design Engineer or Senior ASIC Design Engineer to drive high-performance NoC IP within AI SoCs. The role requires hands-on RTL design, microarchitecture, and strong collaboration across architecting and verification teams.
The position emphasizes Synthesis, timing, CDC/Lint, PPA trade-offs, and post-silicon support, with Python scripting to automate design flows.
We have an opening for a Senior NoC/SoC ASIC Design Engineer
- Verilog & Python in San Diego, CA, United States within Engineering.
For the Senior NoC/SoC ASIC Design Engineer
- Verilog & Python position at Wipro, we are reviewing applications now.
Step into the Senior NoC/SoC ASIC Design Engineer
- Verilog & Python role at Wipro in San Diego, CA, United States and grow with us.
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