Senior ASIC Design Engineer Speed Memory & Cache

Qualcomm Technologies, Inc. seeks a seasoned ASIC Engineer to define, model and design RTL for high-performance memory controllers and related IP. You will verify, implement and document the work while collaborating with CPU, DSP and multimedia teams across multiple projects.

The role emphasizes front-end architecture, timing analysis, power optimization, and rigorous debugging during integration into full chips. A Master's degree is preferred.

This role, Senior ASIC Design Engineer – High-Speed Memory & Cache at Qualcomm, could be your next career step.

This is a great opportunity to take on the Senior ASIC Design Engineer – High-Speed Memory & Cache role at Qualcomm.

As a Senior ASIC Design Engineer – High-Speed Memory & Cache, you will play an important part at Qualcomm in San Diego, CA, United States.

We invite applications for the Senior ASIC Design Engineer – High-Speed Memory & Cache position located in San Diego, CA, United States.