Senior Principal Engineer Digital ASIC Design​/Manager

Job Description:

Kyocera International, Inc. is seeking a Senior Principal Engineer for Digital ASIC Design at its San Diego, CA facility. This role involves leading digital design projects, overseeing implementation and verification processes, and collaborating with cross-functional teams to develop innovative solutions in the semiconductor industry. The position offers a competitive salary and a comprehensive benefits package, emphasizing work-life balance and professional growth.

Responsibilities:

• Lead digital design projects from inception to production for mixed signal ICs.
• Hire and manage full-time employees or contractors to support projects.
• Architect and design digital control functionality interfacing with I/O and analog functions.
• Perform RTL design, synthesis, and static timing analysis for digital control logic.
• Oversee project resource planning, schedule development, and milestone tracking.
• Ensure integrity of physical layer design during PNR.
• Develop test plans and oversee digital verification and coverage analysis.
• Support mixed signal verification of design.
• Perform scan insertion, MBIST, and LBIST.

Qualifications:

• BS or MS degree in Electrical Engineering.
• 15 years of industry experience in Digital ASIC design with complex multi-million gate architectures.
• Proven technical leadership experience.
• Experience with mixed-signal design methodology.
• System level experience with architectural tradeoffs for software and hardware integration.

Skills:

• Strong verbal and communication skills.
• Ability to work with cross-functional teams across geographical boundaries.
• Experience with requirements development and design reviews.
• In-depth knowledge of digital RTL design (Verilog/System Verilog).
• Familiarity with production test methods and DFT architecture.