VHDL FPGA Digital Engineer | Secret Clearance

PDS Defense, Inc. in San Diego, CA is seeking a Digital Engineer to design and test VHDL-based digital designs for SDR applications. You will work with FPGA tools and collaborate with multidisciplinary teams in both waterfall and Agile environments.

The role requires strong VHDL experience, formal verification knowledge, and an active Secret Clearance. Occasional collaboration with DoD systems is expected. Competitive compensation with benefits depending on assignment.

We are currently recruiting a VHDL FPGA Digital Engineer | Secret Clearance for our team in San Diego, CA, United States.

We would love to welcome a new VHDL FPGA Digital Engineer | Secret Clearance to our group in San Diego, CA, United States.

For the VHDL FPGA Digital Engineer | Secret Clearance position at PDS Defense, Inc., we are reviewing applications now.