Pre-Silicon Validation Engineer ASICS Engineering

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* Job Title:

Pre-Silicon Validation Engineer*
* ** Location**:
San Diego, CA (Onsite)  
** Job Summary
** We are seeking a highly motivated and experienced
** Junior/Senior Emulation Engineer
** to support the development and validation of complex ASIC and FPGA-based designs. The ideal candidate will have a strong background in hardware emulation, RTL verification, system-level debugging, and software-hardware co-validation. Experience leveraging AI-driven productivity tools and automation techniques for design verification and debug is highly desirable.  
** Key Responsibilities
*** Develop, deploy, and maintain ASIC/FPGA emulation environments for complex SoC designs.
* Port RTL designs onto industry-standard emulation platforms such as Cadence Palladium, Siemens Veloce, or FPGA prototyping systems.
* Work closely with RTL, verification, architecture, and software teams to enable early hardware/software co-validation.
* Develop test benches, transactors, and verification infrastructure using System Verilog and C/C++.
* Analyze and debug functional, performance, and system-level issues in emulation environments.
* Create automation scripts and workflows using Python to improve productivity, regression execution, and debug efficiency.
* Collaborate with design teams to optimize designs for emulation performance and resource utilization.
* Develop methodologies for waveform analysis, signal tracing, and failure root-cause identification.
* Apply AI-assisted tools and techniques to accelerate verification, debug, data analysis, and engineering productivity.
* Generate technical documentation and present findings to cross-functional teams and leadership.  
** Minimum Requirements
*** Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
* 0-2+ years of experience in ASIC verification, FPGA prototyping, or hardware emulation.
* Strong expertise in:  + System Verilog  + C/C++  + Linux environment and shell scripting  + Python programming  + ASIC and FPGA Emulation platforms
* Experience with RTL debugging, waveform analysis, and design verification methodologies.
* Knowledge of SoC architectures, bus protocols, and hardware/software interactions.
* Strong analytical and problem-solving skills.  
** Preferred Qualifications
*** Experience with Cadence Palladium, Protium, Siemens Veloce, or Synopsys ZeBu platforms.
* Familiarity with FPGA implementation flows using Xilinx or Intel FPGAs.
* Exposure to AI/ML technologies and AI-powered engineering tools.
* Knowledge of PCIe, CXL, DDR, Ethernet, or other high-speed interfaces.
* Experience with cloud-based compute environments and large-scale regression management.  
** Desired Skills
*** System Verilog* C/C++
* Linux* Python
* ASIC Emulation
* FPGA Prototyping
* SoC Verification
* Hardware/Software Co-Validation
* Debug and Root Cause Analysis
* AI-Assisted Engineering Tools
* Automation and Scripting
* Cross-Functional Collaboration
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* Minimum Qualifications:

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* • Bachelor's degree in Science, Engineering, or related field.

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Employer:

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment…