ASICS Design Verification Engineer-Senior

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group  ASICS Engineering General

Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.

The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The responsibility of the position involves comprehensive pre-silicon test planning for digital power IP's, its testbench development using the advanced verification methodology such as System Verilog-UVM, coverage development, assertion model development and formal verification (property checking). Learn and deploy power-aware UPF verification flow and methodology.

Involve in developing automation to improve verification efficiency.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

ORMaster's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

ORPhD in Science, Engineering, or related field.

Qualifications Bachelor's degree in Engineering, Science, or a closely related field2+ years of experience with ASIC design and verification tools, techniques, and methodology

Preferred Qualifications Master’s degree in Computer Science, Electrical Engineer, Computer Engineering, or a closely related field6+ years of experience with ASIC design and verification tools, techniques, and methodology6+ years of experience with digital design concepts and RTL languages such as System Verilog or Verilog, or VHDL.
6+ years of experience with computer architecture fundamentals, Object-oriented programming concepts and C or C++ programming skills.
6+ years of experience with developing block-level testbench environment using System

Verilog6+ years of experience with verification methodologies through coursework or past experiences such as UVM or OVM and exposure to Assertion based Formal Verification6+ years of experience with scripting/automation skills using either Perl or python

Experience with AMBA Bus protocol (AXI/AHB/APB etc) is desirable (not mandatory)
Knowledge or experience with Assertion Based Formal Verification is desirable (not mandatory)
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EEO

Employer:

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits :$ - $The above pay scale reflects the broad, minimum to…