ASIC Design Engineer – SoC Interconnect, Cache & Memory Systems

Qualcomm Technologies, Inc.

Engineering Group, Engineering Group > ASICS Engineering

At Qualcomm, we believe in the power of technology. For decades, our innovations have transformed industries, improved billions of lives, and addressed some of society's greatest challenges. As a leading technology innovator, Qualcomm continues to push the boundaries of what's possible, enabling next-generation experiences and helping create a smarter, more connected future.

Our mission is to deliver industry-leading System-on-Chip (SoC) solutions that power smartphones, PCs, XR devices, automotive platforms, and emerging technologies. We are seeking talented ASIC Design Engineers to contribute to the architecture, microarchitecture, design, and deployment of next‑generation SoC Interconnects, Cache and Memory Subsystems, and High‑Speed DDR Memory Controllers.

In this role, you will work closely with architecture, verification, physical design, and software teams to develop high‑performance, power‑efficient silicon solutions that enable Qualcomm's most advanced products.

• Develop microarchitecture definitions and design specifications for complex SoC subsystems.
• Design, implement, and validate RTL for SoC interconnects, cache controllers, memory subsystems, and DDR memory controller components.
• Collaborate with system architects to evaluate hardware feasibility of new features, algorithms, and performance requirements.
• Optimize designs for performance, power, area, timing, and scalability.
• Work closely with verification teams to develop test plans, review coverage, debug issues, and achieve design quality goals.
• Support synthesis, timing closure, power analysis, gate‑level simulations, and physical design activities.
• Participate in system‑level integration and debugging throughout the product development cycle.
• Investigate and resolve pre‑silicon and post‑silicon issues.
• Contribute to C/C++ modeling, design methodologies, and process improvements that enhance engineering productivity and design quality.
• Collaborate across cross‑functional teams to successfully deliver silicon for production.

• Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 0-4+ years of industry experience or relevant academic experience in ASIC/SoC design.
• Experience or coursework in:
  Verilog and/or System Verilog RTL design Computer Architecture ASIC design methodologies Digital logic design C, C++, and/or Python programming
• Strong analytical and problem‑solving skills.
• Excellent communication and collaboration skills.

• SoC interconnects and on‑chip communication fabrics
• Cache and memory subsystem design
• DDR/LPDDR memory controller architecture and design
• ARM or x86 processor architectures and bus protocols
• RTL development for CPUs, cache controllers, or memory controllers
• Low‑power design methodologies
• Functional verification and coverage‑driven verification techniques
• Synopsys synthesis tools and ASIC implementation flows
• Timing closure, physical design support, and power optimization
• Silicon bring‑up and post‑silicon debug

• Bachelor's degree in Science, Engineering, or related field.

Qualcomm is an equal opportunity employer.

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is…