Principal SOC Architect, AI Accelerators

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group  ASICS Engineering General

Summary:

Qualcomm is looking for an experienced SoC architect to work on the next generation AI products in the datacenter.

We are looking for a data center engineer whose expertise spans security, RAS and/or virtualization.

The selected candidate will help define the architecture and drive requirements from card/server level to a full rack.

Responsibilities:

Understand trends in datacenter security, RAS and virtualization through customer and ODM engagements

Work with customers to determine HW and SW requirements

Analysis of the current AI server deployments in different datacenters

Architect enhancements required for deployment of next-generation AI products

Design the SOC architecture for at least one or more of the following areas:
1.RASReliability analysis of the card, server and rack level systems

Design/architect for easy serviceability

Implement HW/SW techniques for improved availability to mitigate failures.
2.Virtualization Support multiple clients using VMs on the same HW platform

Leverage industry best practices for security and isolation between clients
3.Security Confidential compute or its equivalent based on datacenter requirements

Minimum Requirements:

Master's degree or equivalent in Engineering, or related field.
10+ years HW design, testing and commercialization experience3+ years of experience of working in datacenter related products - servers, accelerators  knowledge of datacenter - security, RAS, virtualization, telemetry, power, cooling, lifecycle, deployments etc.

Good knowledge of scale-up and scale-out architectures.

Willingness to work in a high-caliber international/multi-site team Preferred

Skills and Experience:

Experience and knowledge of Server SOC security specifically in the area of Confidential Compute Participation in OCP Security Forum and Confidential Compute Forum is a plus Experience and knowledge in defining RAS infrastructure at the Server SoC level

Experience and knowledge of PCIe protocol spanning SRIOV, SIOV, IDE, TDISP etc.

Good knowledge of server SOC architectures focusing on security, RAS and virtualization

Good knowledge of Ethernet protocols with emphasis on error recovery and virtualization

Ability to work with PdM (Product Marketing) and datacenter customers to define requirements covering security, RAS and virtualization etc.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.

ORMaster's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.

ORPhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

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