System Validation Lead; Mobile Platforms

Qualcomm Technologies, Inc.

Engineering Group, Engineering Group > ASICS Engineering

Qualcomm’s System Validation & Emulation (SVE) team is part of the central SoC validation organization responsible for ensuring end-to-end silicon quality across pre- and post-silicon phases.

This role focuses on content quality, validation frameworks, and system-level validation enablement, offering deep exposure to Qualcomm SoCs through bare-metal validation content, scalable automation frameworks, and complex system debug. Engineers in this role work across HW and SW boundaries to develop, validate, and scale system-level test content, ensuring high-quality silicon validation across a wide range of SoC domains.

Excellent Opportunity to work on cutting-edge SoCs across multiple product segments, including:

• Premium mobile and flagship platforms
• Data center
• AI Accelerator platform

We are seeking a highly experienced SVE Content Lead to drive validation strategy, test planning, content development, and execution for next-generation Premium Tier Mobile and AI accelerator platforms. This role owns end-to-end system-level validation content across emulation and silicon phases while partnering with Architecture, Design, DV, Software, Performance, Power, and Product teams to ensure comprehensive coverage and successful product execution.

The ideal candidate combines strong SoC architecture knowledge, validation expertise, technical leadership, and program management skills to lead geographically distributed engineering teams and deliver high‑quality validation solutions at scale.

• Define and drive system-level validation strategy for complex SoC programs.
• Develop comprehensive validation plans spanning pre-silicon and post-silicon phases.
• Identify high-risk customer use cases and translate them into executable validation content.
• Define stress, power, performance, scalability, and corner‑case validation scenarios.
• Establish platform coverage plans across Veloce, RUMI, FPGA, and Silicon environments.
• Drive coverage closure based on previous program learnings and emerging architectural risks.

• Own end‑to‑end content strategy, roadmap, assumptions? (??)
• Drive content architecture and test plan reviews across multiple subsystem domains.
• Ensure content quality, scalability, reusability, and maintainability.
• Lead content stabilization, qualification, and regression activities.
• Drive system-level content releases for HVV, SLT, and production screening environments.

• Partner with Architecture, Design, DV, Firmware, and Software teams to define validation requirements.
• Lead debug of complex silicon, emulation, firmware, and software issues.
• Drive root‑cause analysis and corrective action plans for critical product issues.
• Influence future validation methodologies, frameworks, and automation roadmaps.
• Champion innovative approaches leveraging AI/GenAI‑driven validation methodologies.

• Drive cross‑functional execution across multiple global sites.
• Coordinate content scrums, program reviews, readiness assessments, and milestone tracking.
• Manage external dependencies and risk mitigation plans.
• Partner with Emulation, System Debug, and Execution teams to drive program success.
• Provide regular executive‑level status updates and technical reviews.

• Mentor senior engineers and future technical leaders.
• Build high‑performing global content teams.
• Drive engineering excellence, execution rigor, and scalable operating models.
• Influence resourcing, organizational planning, and capability development efforts.

• Bachelor's, Master's, or PhD in Electrical Engineering,…