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Systems Engineer Hardware Engineer

Senior Post-Silicon ASIC Validation Engineer

Job in San Francisco, San Francisco County, California, 94199, USA
Listing for: Eridu Corporation
Full Time position
Listed on 2025-12-15
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 185000 - 250000 USD Yearly USD 185000.00 250000.00 YEAR
Job Description & How to Apply Below
A leading AI hardware startup in San Francisco is seeking a Post-Silicon ASIC Validation Engineer. The ideal candidate will focus on validating complex multi-die systems and high-speed interconnects. Responsibilities include driving validation planning and execution, developing automation, and collaborating with design teams. Candidates should have a relevant degree and expertise in ASIC validation, UCIe standards, and Python scripting. The role offers a salary range of $185,000 - $250,000 annually, depending on experience.
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Position Requirements
10+ Years work experience
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