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Senior RTL Design Engineer – SystemVerilog, Low-Power

Job in San Francisco, San Francisco County, California, 94199, USA
Listing for: Apple Inc.
Full Time position
Listed on 2026-01-07
Job specializations:
  • Engineering
    Systems Engineer
Salary/Wage Range or Industry Benchmark: 181100 - 318400 USD Yearly USD 181100.00 318400.00 YEAR
Job Description & How to Apply Below
A leading tech company in San Francisco seeks an experienced engineer for its wireless silicon development team. This role involves architecting and designing modules, running formal verification, and collaborating across functional teams. The ideal candidate has a BS degree, at least 10 years of industry experience, and fluency in System Verilog. The position offers a competitive salary range and comprehensive benefits, including stock options and educational reimbursement.
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Position Requirements
10+ Years work experience
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