FPGA Engineer PHASER

PHASER Hardware San Francisco, CA Full-time Mid-Senior

Write the gateware that programs PHASER's modulators and turns detector samples into results.

• Develop FPGA designs for modulator control and readout
• Build host interfaces and drivers
• Verify timing and throughput against the system budget

• Experience with Verilog/System Verilog or VHDL
• High-speed serial interfaces
• Hardware verification practice

• Real-time signal processing

Tensa Co builds the compute and software that make AI faster, more efficient and accountable: PHASER, an optical approach to AI acceleration, and Tensor Code, software for AI teams can check, correct and own.

Tensa Co is an equal opportunity employer. We consider all qualified applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, veteran status, or any other protected characteristic.