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Member of Technical Staff - Compiler Engineer

Job in San Francisco, San Francisco County, California, 94199, USA
Listing for: Gimlet Labs, Inc.
Full Time position
Listed on 2026-10-17
Job specializations:
  • Software Development
    Software Engineer, AI Engineer (Applied/Software), Computer Software / Middleware
Salary/Wage Range or Industry Benchmark: 150000 - 190000 USD Yearly USD 150000.00 190000.00 YEAR
Job Description & How to Apply Below
** About us
** Gimlet is building the first multi-silicon neocloud designed for fast, efficient AI inference.

We combine large-scale compute infrastructure with an execution platform that partitions AI workloads and maps each stage to the hardware best suited to run it.

We work with foundation labs, hyperscalers, and AI-native companies, giving our team access to technical problems spanning frontier models, production infrastructure, and emerging hardware.
** About the role
** As a Member of Technical Staff, Compiler, you will build Gimlet's AI Compiler Stack: the layer that determines how AI workloads are represented, optimized, and executed across hardware with fundamentally different architectures, memory systems, and performance characteristics.

The compiler is one of the hardest and most critical parts of our inference stack. Its decisions reach directly into scheduling, communication, memory movement, kernel execution, and end-to-end serving performance of Gimlet’s inference stack. A compiler built for a single target can bake in assumptions about the memory hierarchy and execution model. We can't. That constraint is what makes the work interesting.

Our stack is built on open-source MLIR and LLVM compiler infrastructure. We design our own dialects, passes, and lowering paths on top of that infrastructure rather than maintaining a proprietary compiler from scratch. You will be working in an ecosystem you can carry with you, alongside people who know it deeply.
** What you will work on:
*** Scaling the compiler architecture to a growing set of heterogeneous compute architectures. New CPUs, GPUs, and accelerators arrive with different memory models, execution models, and tool chains, and each one can't cost us a rewrite. You will work on the abstractions, dialects, and lowering paths that let the stack absorb a new target quickly and still generate code competitive with a vendor-native toolchain.

Our architecture for running AI workloads across heterogeneous hardware describes where the compiler sits in the broader system.
* Optimizing end-to-end performance that includes implementing operator fusion, target-agnostic middle-end optimizations, target-specific optimizations and the execution-planning decisions that shape how computation is partitioned across devices and how intermediate state moves between them. This also includes evaluating and integrating agent-driven kernel generation as a first-class code generation strategy: deciding when a generated kernel beats a library or hand-written one, and how the compiler makes that call automatically and safely.

We have published early results on AI-generated CUDA kernels and AI-generated Metal kernels; folding this into the compiler itself is open ground.
* Supporting new models and serving techniques in production. New architectures and inference strategies should run efficiently without per-target hand-tuning. Our work on low-latency speculative decoding and prefill/decode disaggregation across accelerators shows the shape of these problems end to end.
** Who you will work with
** This is a small team where the boundaries between disciplines are thin. You will be part of the compiler team and will work directly with engineers and researchers working on LLM architecture, inference optimization, kernel engineering, distributed systems, and datacenter infrastructure deciding what gets served and on what hardware. Compiler decisions here are made with full visibility into the workload and the machine, which is rarer than it sounds.
** What success looks like
** In your first 12–18 months, you will:
* Ship compiler optimizations that measurably improve production latency, throughput, utilization, or cost.
* Help bring a new accelerator architecture…
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