Senior Memory Architect: -Speed, Low-Power RAM Design

Lattice Semiconductor, with a major presence in San Jose, California, seeks a Sr. Memory Designer to lead the design of high-speed, low-power memory blocks for FPGA architectures.

You will own memory architecture, verification, and integration across the full design flow, collaborating with architecture and design teams to meet performance and yield targets. You will contribute to next-generation memory solutions, drive optimization, and ensure robust design practices while working in a

Consider building your career as a Senior Memory Architect:
High-Speed, Low-Power RAM Design at Lattice Semiconductor.

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This posting is for the Senior Memory Architect:
High-Speed, Low-Power RAM Design role at Lattice Semiconductor, based in San Jose, CA, United States.

We are looking to fill the Senior Memory Architect:
High-Speed, Low-Power RAM Design position at Lattice Semiconductor in San Jose, CA, United States.