Semiconductor Test Development Engineer

A premier chip and silicon IP provider is seeking an exceptional Staff Test Engineer to join our Operations team in San Jose, CA.

This position offers a hybrid work model, with three days onsite each week and two days remote.

• Define the test plan and work with design to ensure good test coverage.
• Communicate effectively with internal cross‑functional teams, customers, and suppliers.
• Design ATE hardware for NPI support, including load board, probe card, and interface.
• Manage the product life cycle from design and prototypes, through high‑volume manufacturing bring‑up, to RMA/sustaining support.
• Optimize yield, test time, and multi‑site count.

• B.S./M.S. in Electrical Engineering or equivalent experience.
• Experience with test coverage and DFT (Scan/ATPG/JTAG/BIST).
• Experience working with local and offshore OSATs.
• In‑depth knowledge of Advantest V93k.
• Experience with Smartest, Redhat, and GIT/SVN.
• Ability to independently learn and problem‑solve.
• Comfort with collaboration, open communication and reaching across functional borders.

• Experience in DDR and high‑speed digital products.

San Jose, CA

Relocation assistance will be provided and will be based on your current location.

3 days onsite, 2 days remote.

Up to ~$177K (dependent on experience).

Mid‑Senior level

Full‑time

Semiconductor Manufacturing