Lead SW Post-Silicon Validation Engineer

Meet the team:

Welcome to the Post-Silicon Validation Team at Cisco! Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with verification engineers, designers, and cross‑functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle.

Operating at the forefront of technology, we work with cutting‑edge, high‑speed, and power‑hungry devices. Our small, but highly influential team thrives in this challenging environment, leveraging our expertise to impact the future of networking technology. With a commitment to excellence and a passion for transformative technology, we are shaping the future of high‑performance networking and delivering unparalleled value in every project we undertake.

Join us and be a part of a team where professionalism meets impact!

Lead validation of high‑performance networking silicon. This role is responsible for validating complex networking ASICs in real hardware environments, developing robust validation software, and driving root‑cause analysis of silicon, firmware, and system‑level issues. The ideal candidate will bring deep understanding of hardware‑software interactions and hands‑on experience validating networking features from silicon bring‑up through production readiness.

• Lead post‑silicon validation efforts for networking ASICs

• Own and execute comprehensive validation plans covering functionality, performance, power, and reliability

• Drive silicon bring‑up, stepping qualification, and production readiness activities

• Mentor engineers and provide technical guidance across validation efforts

• Architect and develop validation software, diagnostics, and automation frameworks

• Write low‑level and system software (C/C++, Python) to exercise networking features and hardware blocks

• Develop stress, scale, and long‑duration tests to uncover silicon defects

• Integrate validation tests into regression and continuous test environments

• Perform complex hardware‑software co‑debug using lab and software tools

• Analyze packet flows, performance counters, traces, and logs to identify failure mechanisms

• Isolate issues across silicon, firmware, drivers, and OS layers

• Partner with SDK, architecture, and firmware teams to drive issue resolution

• Validate networking protocols and features such as Ethernet, switching, routing, QoS, traffic management, and security

• Validate high‑speed interfaces (e.g., Ethernet PHY/MAC, PCIe, Ser Des, DDR5, USB
  3.x)

• Validate low speed interfaces (e.g., USB
  2.0, eMMC, SPI, MDIO, I2C, UART)

• Exercise data plane and control plane functionality under real‑world traffic conditions

• Work closely with architecture, SDK, firmware, systems, and software teams

• Provide structured feedback to improve silicon robustness, debuggability, and testability

• Document validation results, silicon issues, and recommended workarounds

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 8+ years of experience in post‑silicon validation and debug

• Experience in C/C++ for system‑level or low‑level software development

• Scripting experience in Python for test automation and analysis

• Experience with networking architectures and protocols

• Experience with hardware‑software co‑debug in lab environments

• Debug experience with: DDR5, USB
  3.0, SGMII, PCIe Gen3, USB
  2.0, eMMC, SPI, MDIO, I2C, UART.

• Experience with networking ASICs, switches, routers, or NPUs

• Knowledge of Ethernet standards (1G–800G), PCIe, and high‑speed Ser Des

• Experience with Linux kernel, drivers, networking stacks

• Familiarity with traffic generators, packet analyzers, and protocol analyzers

• Experience with performance benchmarking, latency analysis, and throughput optimization

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