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Sr. Principal Analog IC Designer
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-01-03
Listing for:
Cadence Design Systems, Inc.
Full Time
position Listed on 2026-01-03
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer
Job Description & How to Apply Below
• Candidate’s background should include a minimum of 7 years of experience in CMOS Ser Des or high-speed I/O IC design and development
• Working knowledge of a set of common Ser Des standards and their electrical requirements is a plus
• Must have a thorough understanding of jitter and signal equalization techniques
• Proficient design experience in most of the following Ser Des circuit blocks:
Driver;
Receiver;
Serializer;
Deserializer;
Phase Interpolator;
Low jitter PLL;
High Speed Clock Distribution; ADC and DAC;
Bias and Bandgap; and Voltage Regulators
• Excellent problem solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment
• Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification
• Cadence tool experience, lab test experience, and design experience at >10
Gbps and in
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