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RF​/Analog Layout Engineer — Lead Tapeout

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Samsung Semiconductor Inc.
Full Time position
Listed on 2026-01-12
Job specializations:
  • Engineering
    Systems Engineer, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 125000 - 150000 USD Yearly USD 125000.00 150000.00 YEAR
Job Description & How to Apply Below
Position: Staff RF/Analog Layout Engineer — Lead Tapeout
A leading technology firm in San Jose, CA, is seeking an experienced RF/Analog Circuit Layout Designer. In this role, you will design next-generation RF systems and lead a team of layout engineers. The ideal candidate has significant experience in analog layout design, strong leadership skills, and proficiency in CAD tools like Virtuoso. Successful applicants will enjoy a collaborative environment, competitive compensation, and extensive benefits, including over 4 weeks of paid time off.
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