Design Verification Consultant

Veri Fast Technologies provided pay range

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$/yr - $/yr

We are seeking a Design Verification Engineer to ensure functional correctness, robustness, and specification compliance of ASIC/SoC designs for datacenter AI silicon. This role focuses on building verification environments, executing test plans, and working closely with RTL designers to debug and close issues prior to tape‑out.

• Develop and execute verification plans based on design specifications and RTL intent
• Build and maintain System Verilog/UVM test benches, assertions, and coverage models
• Perform functional, corner‑case, and regression testing of RTL designs
• Debug failures and collaborate with RTL designers to resolve issues efficiently
• Track and close functional and coverage metrics
• Document verification results and provide status updates to stakeholders

• BS/MS in Electrical Engineering, Computer Engineering, or related field
• Strong experience with System Verilog and UVM-based verification
• Solid understanding of RTL design concepts (Verilog/System Verilog)
• Experience with simulation tools (Questa, VCS, Xcelium, or similar)
• Proficiency in functional coverage and assertion-based verification (SVA)

• Verification experience with PCIe, Ethernet, UCIe, and/or CXL
• Familiarity with high‑speed interfaces, SoC interconnects, and protocol‑based verification
• Experience using protocol VIPs and debugging complex data‑path issues

• Exposure to formal verification or emulation
• Scripting experience (Python, Tcl, or Shell) for automation

Mid‑Senior level

Contract

Semiconductor Manufacturing

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