Senior Principal Signal and Power Integrity Engineer

Senior Principal Signal and Power Integrity Engineer

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Are you enthusiastic about new technologies? This position is an excellent opportunity for an experienced and highly motivated Signal and Power Integrity engineer to join the SIPI team and work on the future of System-in-Package designs, focusing on finding the optimum implementations that will improve Arm IP performance.

The semiconductor industry transitioned from multichip modules, then to SoC and is now moving into advanced System-in-Package (SiP) which changes the influence of Arm IP. Arm IP will begin to span multiple pieces of silicon in a system and optimizing this interaction is critical for internal development and enabling partner success.

The experienced SIPI engineer will be in charge of creating and analysing novel System-in-Package designs as well as delivering robust design methodologies and silicon/platform electrical integrity solution spaces. Innovative power delivery techniques and interfaces will be key in emerging technologies as advanced packaging is growing in industry importance. They will need to create or supervise package designs then run specific packaging analysis tools.

Senior engineers are expected to play a tech lead role.

The candidate will work closely with teams in UK, France, and other Arm locations on a need basis. Candidate must have deep knowledge in interface design and constraints in order to participate in emerging interfaces definition, understand impact on Arm IP, and possibly influence the standard. Clear communication with other team members is important. Candidate may be expected to supervise lab evaluations of the on post-silicon chip, including debugging and solving any possible system level issues.

• Engineering degree or equivalent
• 5 or more years of experience in System level Signal Integrity with focus on interfaces’ impact on systems.
• Very good at working with SIPI analysis environments (Ansys suite, Cadence, or other)
• Deep understanding of multi-port matrices (S, Y, Z parameters)
• Good understanding of electromagnetic extraction methodologies and their limitations.
• Understanding of package drawing to effectively drive a design engineer and perform package drawing modifications tasks on occasional basis.
• Able to provide technical directions to the sub-work groups and influencing key product/platform roadmap decisions.
• Pre-layout platform design guideline development for SI/PI interfaces.

• Good understanding of SoC implementations and models (IBIS models, power models, impedance profiles of power delivery networks)
• Experience in System level Power Integrity with focus on package level PI trade-offs.
• Experienced in complete package design flow from ball map stage up to final tape‑out and well versed with all the steps and setup required.
• Knowledge in packaging manufacturing steps, and their constraints
• Experience on advanced packaging (2.5D, 3D)
• Knowledge of Linux environment and scripting (Python, Skill,…)

• Be able to mentor other SIPI engineers
• Proficient in English with good interpersonal skills, oral and written
• Self‑motivated, looking to accept new challenges
• Ready to work in worldwide team setup and work seamlessly across teams.
• Attention to detail
• Pro‑active and pragmatic with regards to problem solving
• Be willing to iteratively improve designs and repeatedly attempt to develop solutions to difficult problems

You will work directly with engineers across the company to build next‑generation systems. You will have a direct impact on our bottom line and the ability to deliver improvements for our customers. You will be part of a growing, fast‑paced, and fun team. You will have ownership for the implementation of your work. We have a friendly and high‑performance working environment, where Arm offers a competitive benefits package including private medical insurance (employee and family), 20‑day sabbatical every four years, supplementary pension.

$312,800-$423,200 per year

At Arm, we want…