IC Verification Engineer

IC Verification Engineer

Broadcom

• Develop test plans for all features for Block/Core/SOC and write functional coverage.
• Architect and develop scalable, reusable test benches using the verification methodology framework.
• Build pseudo‑random tests to verify and achieve full functional coverage.
• Debug regression failures, analyze functional coverage gaps, and improve tests to cover gaps.
• Document verification strategy including test plans, verification environment, pseudo‑random tests, etc.; lead reviews with design/architecture teams.
• Drive improvements in verification in terms of quality and efficiency.

• Bachelor’s degree in Electrical Engineering or a related field with 8+ years experience, or Master’s degree with 6+ years experience.
• Experience writing and debugging complex test benches.
• Understanding of all aspects of verification (test benches, test plans, pseudo‑random tests, functional coverage).
• Proficiency in System Verilog and verification methodologies such as UVM/VMM/OVM.
• Strong knowledge of OOP principles.
• Knowledge of PCIe or other multi‑layered protocols is a plus.
• Capability to work independently and deliver results.

The annual base salary range for this position is $120,000 – $192,000. This position is also eligible for a discretionary annual bonus and equity, according to respective plan documents. Broadcom offers a competitive benefits package including medical, dental, and vision plans, 401(k) with company matching, Employee Stock Purchase Program, Employee Assistance Program, paid holidays, paid sick leave, vacation time, and compliance with applicable family leave laws.

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San Jose, CA (open to remote options)