Lead MTS Applications Engineer — Hybrid, Bench & Validation
Listed on 2026-10-07
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Engineering
Validation Engineer, Systems Engineer, Test Engineer
Rambus, a premier chip and silicon IP provider, is seeking a Lead MTSApplication
Engineer to join the Memory Interface team in San Jose, CA. The role involves bench validation of I2C/I3C protocols and post-silicon support, with a hybrid work model and opportunities to work with cutting-edge DDR5 enablement devices.
The ideal candidate has 5+ years in post-silicon digital ASIC bench validation, Python-based lab automation, and strong knowledge of I2C/I3C protocols; B.S. or M.S.
Our team is growing, and we are hiring a Lead MTS Applications Engineer — Hybrid, Bench & Validation in San Jose, CA, United States.
Learn more about the Lead MTS Applications Engineer — Hybrid, Bench & Validation role in the description above.
We appreciate your interest in this position.
Join and contribute to our ongoing work.
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