Senior ASIC RTL & Digital Design Architect
Listed on 2026-10-07
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Engineering
Hardware Engineer, Electronics Engineer -
Design & Architecture
Micron Technology seeks a Principal ASIC Design Engineer to own digital block architecture, RTL design, and the front-to-back tape-out flow. You will drive CDC strategy, constraints, and collaboration with layout and analog teams to ensure robust, high-performance PHY design.
The role requires 7–12 years of ASIC experience, a degree in EE/CE, and expert use of System Verilog, design compilers, Prime Time/Tempus, VCS/Xcelium, and SVA.
Consider building your career as a Senior ASIC RTL & Digital Design Architect at Micron Technology.
This is a great opportunity to take on the Senior ASIC RTL & Digital Design Architect role at Micron Technology.
As a Senior ASIC RTL & Digital Design Architect, you will play an important part at Micron Technology in San Jose, CA, United States.
We invite applications for the Senior ASIC RTL & Digital Design Architect position located in San Jose, CA, United States.
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