Sr. Director of Packaging Engineering

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THE ROLE AMD is seeking a Senior Director of Packaging Engineering to lead the strategy, development, and execution of advanced IC packaging technologies across AMD's diverse silicon product portfolio.

This leader will develop a strong engineering team, guide package development from concept through manufacturing ramps, and work with product teams and suppliers to deliver solutions that meet performance, reliability, cost, and schedule requirements.

THE PERSONA highly respected engineering leader who can operate simultaneously at the strategic, technical, and organizational levels. They are capable of setting packaging technology direction for a multi-billion-dollar semiconductor business while leading large global teams and influencing executives, customers, and supply chain partners.

This is a highly visible role and will drive  KEY RESPONSIBILIITIESChampion best practices in design-for-manufacturability, reliability, and cost optimization across the package, SI/PI and thermal/mechanical technology portfolio

Lead, mentor, and grow a global team of engineers and technical leads; building organizational depth through development of talent, including specialized SI/PI and thermal/mechanical design expertise.

Own end-to-end packaging development from concept through new product introduction (NPI) and high-volume manufacturing (HVM), including design rules, qualification, and yield/reliability ramp.

Direct package-level signal integrity and power integrity co-design strategy, including interconnect/channel modeling, power delivery network (PDN) design, impedance control, and high-speed serial/parallel interface optimization for multi-die and chiplet architectures.

Own thermal and mechanical package design strategy, including thermal simulation and characterization, warpage control, die/package stress management, and thermal-mechanical co-design for high-power, high-density silicon.

Participate in strategic relationships with OSAT, substrate, and PWB supply partners, including technology development, qualification, capacity planning, and HVM ramp for next-generation nodes.

Partner cross-functionally with business units, silicon/product design, marketing, applications, product engineering, operations, and quality to translate product requirements into scalable packaging solutions.

Drive technology proliferation and standardization initiatives to improve development velocity, technology reuse, manufacturing scalability, and cost competitiveness across the packaging portfolio.

Represent AMD's packaging technology strategy in cross-functional and executive reviews, and externally with customers as appropriate.

Drive innovation in heterogeneous integration, chiplet-based architectures, and high-speed/optoelectronic packaging to support AMD's multi-die, networking, and accelerator roadmap.

Establish and monitor engineering budgets, headcount planning, and program schedules for the packaging organization.

PREFERRED EXPERIENCE Significant and  progressive experience in semiconductor IC packaging engineering, with a track record of advancing from individual contributor/engineering manager into director-level technical leadership.

Direct experience developing and qualifying…