Principal PCIe & SSD Validation Architect
Listed on 2026-10-12
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Engineering
Test Engineer, Validation Engineer, Systems Engineer
Micron Technology, Inc. is seeking a Principal PCIe Application Engineer to lead ASIC validation from pre-silicon FPGA development through production release.
You will develop validation plans for functional, performance, power, and reliability across PCIe/NVMe interfaces. The role requires 10+ years in ASIC/SoC validation or SSD controller development, with strong Python/Perl/Shell skills and FPGA/post-silicon experience.
We invite applications for the Principal PCIe & SSD Validation Architect position located in San Jose, CA, United States.
The position is based in San Jose, CA, United States.
This opportunity is part of our work in IT & Technology, Engineering.
The advertised compensation is 204..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Principal PCIe & SSD Validation Architect role in the description above.
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